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for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim?s website at www.maxim integrated .com. general description the max13430e?ax13433e are full- and half-duplexrs-485 transceivers that feature an adjustable low-volt- age logic interface for operation in multivoltage systems. this allows direct interfacing to low-voltage asic/fpgas without extra components. the max13430e?ax13433e rs-485 transceivers operate with a v cc voltage supply from +3v to +5v. the low-voltage logic interface operateswith a voltage supply from +1.62v to v cc . the max13430e/max13432e feature reduced slew-rate drivers that minimize emi and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 500kbps. the max13431e/max13433e driver slew rates are not limit- ed, enabling data transmission up to 16mbps. the max13430e/max13431e are intended for half-duplex communications, and the max13432e/max13433e are intended for full-duplex communications. the max13430e/max13431e are available in 10-pin ?ax and 10-pin tdfn packages. the max13432e/ max13433e are available in 14-pin tdfn and 14-pinso packages. features ? wide +3v to +5v input supply range ? low-voltage logic interface +1.62v (min) ? ultra-low supply current in shutdown mode10? i cc (max), 1? i l (max) ? thermal shutdown protection ? hot-swap input structures on de and re ? 1/8-unit load allows up to 256 transceivers onthe bus ? enhanced slew-rate limiting(max13430e/max13432e) ? extended esd protection for rs-485 i/o pins ?0kv human body model?5kv air-gap discharge per iec 61000-4-2 ?0kv contact discharge per iec 61000-4-2 ? extended -40? to +85? operating temperaturerange ? space-saving tdfn and ?ax packages rs-485 transceivers with low-voltage logic interface ordering information/selector guide part pin-package full/half duplex data rate (mbp) slew rate limited transceivers on bus top mark package code max13430e etb+ 10 tdfn-ep* (3mm x 3mm) half 0.5 yes 256 aus t1033-1 MAX13430EEUB+ 10 max (3mm x 3mm) half 0.5 yes 256 u10-2 max13431e etb+ 10 tdfn-ep* (3mm x 3mm) half 16 no 256 aut t1033-1 max13431eeub+ 10 max (3mm x 3mm) half 16 no 256 u10-2 max13432e esd+ 14 so full 0.5 yes 256 s14-1 max13432eetd+ 14 tdfn-ep* (3mm x 3mm) full 0.5 yes 256 aeg t1433-2 max13433e esd+ 14 so full 16 no 256 s14-1 max13433eesd/v+ 14 so full 16 no 256 s14-1 max13433eetd+ 14 tdfn-ep* (3mm x 3mm) full 16 no 256 aeh t1433-2 typical application circuits appears at end of data sheet. note: all devices are specified over the extended -40? to +85? operating temperature range. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. /v denotes an automotive qualified part. ?ax is a registered trademark of maxim integrated products, inc. applications industrial control systemsportable industrial equipment motor controlhvac max13430eCmax13433e 19-4322; rev 2; 5/10 downloaded from: http:/// available
rs-485 transceivers with low-voltage logic interface absolute maximum ratingsdc electrical characteristics (v cc = +3v to +5.5v, v l = +1.8v to v cc , t a = -40? to +85?, unless otherwise noted. typical values are v cc = +5v, v l = +1.8v at t a = +25?.) (notes 2, 3) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . (all voltages referenced to gnd.)supply voltage (v cc ) ...............................................-0.3v to +6v logic supply voltage (v l ) ......................................-0.3v to +6v control input voltage ( re ) .............................-0.3v to (v l +0.3v) control input voltage (de) ......................................-0.3v to +6v driver input voltage (di) ..........................................-0.3v to +6v driver output voltage (y, z, a, b) ............................-8v to +13v receiver input voltage (a, b) (max13430e/max13431e)....................................-8v to +13v receiver input voltage (a, b) (max13432e/max13433e)..................................-25v to +25v receiver output voltage (ro) .....................-0.3v to (v l + 0.3v) driver output current ....................................................?50ma short-circuit duration (ro, a, b) to gnd .................continuous power dissipation (t a = +70?) 10-pin ?ax (derate 8.8mw/? above +70?) ..........707mw 10-pin tdfn (derate 24.4mw/? above +70?) ......1951mw 14-pin tdfn (derate 24.4mw/? above +70?) ......1951mw 14-pin so (derate 11.9mw/? above +70?) .............952mw junction-to-ambient thermal resistance ( ja ) (note 1) 10-pin ?ax ...........................................................113.1?/w 10-pin tdfn .................................................................41?/w 14-pin tdfn ................................................................41?/w 14-pin so ....................................................................84?/w junction-to-ambient thermal resistance ( jc ) (note 1) 10-pin ?ax ................................................................42?/w 10-pin tdfn ...................................................................9?/w 14-pin tdfn ..................................................................8?/w 14-pin so ....................................................................34?/w operating temperature range ...........................-40? to +85? junction temperature ..................................................... +150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? parameter symbol conditions min typ max units power supply v cc supply-voltage range v cc 3 5.5 v v l supply-voltage range v l 1.62 v cc v i cc supply current i cc de = re = high, no load de = re = low, no load de = high, re = low, no load 2m a i cc supply current in shutdown mode i shdn de = low, re = high, no load 10 ? v l supply current i l ro = no load 1 a driver r l = 100 , v cc = +3v 2 v cc r l = 54 , v cc = +3v 1.5 v cc r l = 100 , v cc = +4.5v 2.25 v cc differential driver output(figure 1) v od r l = 54 , v cc = +4.5v 2.25 v cc v change in magnitude ofdifferential output voltage ? v od r l = 100 or 54 , figure 1 (note 4) 0.2 v driver common-mode outputvoltage v oc r l = 100 or 54 , figure 1 v cc /2 3 v change in magnitude ofcommon-mode voltage ? v oc r l = 100 or 54 , figure 1 (note 4) 0.2 v max13430eCmax13433e 2 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface dc electrical characteristics (continued) (v cc = +3v to +5.5v, v l = +1.8v to v cc , t a = -40? to +85?, unless otherwise noted. typical values are v cc = +5v, v l = +1.8v at t a = +25?.) (notes 2, 3) parameter symbol conditions min typ max units v in = +12v 125 output leakage current(y and z) i olk de = gnd,v cc = v gnd or +5.5v v in = -7v -100 ? 0 v out +12v +250 driver short-circuit outputcurrent (note 5) i osd -7v v out v cc -250 ma (v cc - 1v) v out +12v 15 driver short-circuit outputfoldback current (note 5) i osdf -7v v out +1v -15 ma thermal shutdown threshold t ts +150 ? thermal shutdown hysteresis t tsh 15 ? receiver v cm = +12v 125 input current (a and b) i a, b de = gnd,v cc = v gnd or +5.5v v cm = -7v -100 ? receiver differential thresholdvoltage v th -7v v cm +12v -200 -50 mv receiver input hysteresis ? v th v cm = 0 15 mv receiver input resistance r in -7v v cm +12v 96 k logic interface input high logic level (di, de, re ) v ih 2/3 x v l v input low logic level(di, de, re ) v il 1/3 x v l v input current (di, de, re )i in v di = v de = v re = v l = +5.5v ? ? input impedance on firsttransition r de , re 11 0 k output high logic level (ro) v oh i o = -1ma, v a - v b = v th v l - 0.4 v output low logic level (ro) v ol i o = 1ma, v a - v b = -v th 0.4 v receiver three-state output current (ro) i ozr 0 v ro v l -1 0.01 +1 ? receiver output short-circuit current (ro) i osr 0 v ro v l -110 +110 ma esd protection iec 61000-4-2 air gap discharge ?5 iec 61000-4-2 contact discharge ?0 a, b, y, z to gnd human body model ?0 kv all other pins (except a, b, y, and z) human body model ? kv max13430eCmax13433e maxim integrated 3 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface switching characteristics (max13431e/max13433e (16mbps))(v cc = +3v to +5.5v, v l = +1.8v to v cc , t a = -40? to +85?, unless otherwise noted. typical values are v cc = +5v, v l = +1.8v at t a = +25?.) (notes 2, 3) parameter symbol conditions min typ max units driver t dplh 50 driver propagation delay(figures 2 and 3) t dphl c l = 50pf, r diff = 54 50 ns driver differential output rise orfall time t r , t f c l = 50pf, r l = 54 , figures 2 and 3 15 ns differential driver output skew|t dplh - t dphl | t dskew c l = 50pf, r l = 54 , figures 2 and 3 8 ns maximum data rate 16 mbps driver enable to output high t dzh c l = 50pf, r l = 500 , figure 4 150 ns driver enable to output low t dzl c l = 50pf, r l = 500 , figure 5 150 ns driver disable time from low t dlz c l = 50pf, r l = 500 , figure 4 100 ns driver disable time from high t dhz c l = 50pf, r l = 500 , figure 5 120 ns driver enable from shutdownto output high t dzh ( shdn ) c l = 50pf, r l = 500 , figure 4 5 ? driver enable from shutdownto output low t dzl ( shdn ) c l = 50pf, r l = 500 , figure 5 5 ? receiver t rplh 80 receiver propagation delay(figures 6 and 7) t rphl c l = 15pf 80 ns receiver output skew t rskew c l = 15pf, figures 6 and 7 13 ns maximum data rate 16 mbps receiver enable to output low t rzl figure 8 50 ns receiver enable to output high t rzh figure 8 50 ns receiver disable time from low t rlz figure 8 50 ns receiver disable time from high t rhz figure 8 50 ns receiver enable fromshutdown to output high t rzh ( shdn ) figure 8 5 ? receiver enable fromshutdown to output low t rzl ( shdn ) figure 8 5 ? driver/receiver time to shutdown t shdn 50 340 700 ns max13430eCmax13433e 4 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface switching characteristics (max13430e/max13432e (500kbps))(v cc = +3v to +5.5v, v l = +1.8v to v cc , t a = -40? to +85?, unless otherwise noted. typical values are v cc = +5v, v l = +1.8v at t a = +25?.) (notes 2, 3) parameter symbol conditions min typ max units driver t dplh 180 800 driver propagation delay(figures 2 and 3) t dphl c l = 50pf, r l = 54 180 800 ns driver differential output rise orfall time t r , t f c l = 50pf, r l = 54 , figures 2 and 3 200 800 ns differential driver output skew|t dplh - t dphl | t dskew c l = 50pf, r l = 54 , figures 2 and 3 100 ns maximum data rate 500 kbps driver enable to output high t dzh c l = 50pf, r l = 500 , figure 4 2.5 ? driver enable to output low t dzl c l = 50pf, r l = 500 , figure 5 2.5 ? driver disable time from low t dlz c l = 50pf, r l = 500 , figure 4 100 ns driver disable time from high t dhz c l = 50pf, r l = 500 , figure 5 120 ns driver enable from shutdownto output high t dzh ( shdn ) c l = 50pf, r l = 500 , figure 4 5 ? driver enable from shutdownto output low t dzl ( shdn ) c l = 50pf, r l = 500 , figure 5 5 ? receiver t rplh 200 receiver propagation delay(figures 6 and 7) t rphl c l = 15pf 200 ns receiver output skew t rskew c l = 15pf, figures 6 and 7 30 ns maximum data rate 500 kbps receiver enable tooutput low t rzl figure 8 50 ns receiver enable tooutput high t rzh figure 8 50 ns receiver disable timefrom low t rlz figure 8 50 ns receiver disable timefrom high t rhz figure 8 50 ns receiver enable fromshutdown to output high t rzh ( shdn ) figure 8 5 ? receiver enable fromshutdown to output low t rzl ( shdn ) figure 8 5 ? max13430eCmax13433e maxim integrated 5 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface switching characteristics (max13430e/max13432e (500kbps)) (continued)(v cc = +3v to +5.5v, v l = +1.8v to v cc , t a = -40? to +85?, unless otherwise noted. typical values are v cc = +5v, v l = +1.8v at t a = +25?.) (notes 2, 3) parameter symbol conditions min typ max units driver/receiver time to shutdown t shdn 50 340 700 ns note 2: parameters are 100% production tested at t a = +25?, unless otherwise noted. limits over temperature are guaranteed by design. note 3: all currents into the device are positive. all currents out of the device are negative. all voltages are referenced to deviceground, unless otherwise noted. note 4: ? v od and ? v oc are the changes in v od and v oc , respectively, when the di input changes state. note 5: the short-circuit output current is the peak current just prior to current limiting; the short-circuit foldback output currentapplies during current limiting to allow a recovery from bus contention. typical operating characteriststics (v cc = +5v, v l = +5v, t a = +25?, unless otherwise noted.) v cc supply current vs. temperature max13430e-3e toc01 temperature ( c) v cc supply current (ma) 10 -15 35 60 1 10 100 0 -40 85 de = high, max13433e de = low, max13433e de = high, max13432e de = low, max13432e v l = 5v r diff = 54 di = re = low output current vs. receiver output-high voltage max13430e-3e toc02 output-high voltage, v oh (v) output current for v l = 5v (ma) output current for v l = 1.8v (ma) 2 13 4 20 40 60 0 30 5010 2 4 60 3 51 05 v l = 1.8v v l = 5v output current vs. receiver output-low voltage max13430e-3e toc03 output-low voltage, v ol (v) output current for v l = 5v (ma) output current for v l = 1.8v (ma 2 13 4 80 0 40 6020 80 4 62 05 v l = 1.8v v l = 5v receiver output-high voltage vs. temperature max13430e-3e toc04 temperature ( c) output-high voltage for v l = 5v, v oh (v) output-low voltage for v l = 1.8v, v oh (v) 10 -15 35 60 6.04.0 5.0 5.54.5 2.01.6 1.8 1.91.7 -40 85 v l = 1.8v i o = 1ma v l = 5v receiver output-low voltage vs. temperature max13430e-3e toc05 temperature ( c) output-low voltage, v ol (v) 10 -15 35 60 0.5 0 0.2 0.3 0.40.1 -40 85 v l = 1.8v i o = 1ma v l = 5v differential output current vs. differential output voltage max13430e-3e toc06 output voltage (v) output current (ma) 2 13 4 140 0 80 100 120 6040 20 05 v l = 5v max13430eCmax13433e 6 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface driver differential output voltage vs. temperature max13430e-3e toc07 temperature ( c ) differential output voltage, v od (v) 10 -15 35 60 4.0 0 2.0 3.01.0 0.5 2.5 3.51.5 -40 85 r diff = 54 v l = 5v output current vs. transmitter output-high voltage max13430e-3e toc08 output-high voltage ( v ) output current (ma) 24 3 -6 140 0 80 100 120 6040 20 -7 5 -2 0-1 1 -4-5 -3 v l = 5v output current vs. transmitter output-low voltage max13430e-3e toc09 output-low voltage ( v ) output current (ma) 10 4 160 0 80 100 120 140 6040 20 01 2 26 8 v l = 5v shutdown current vs. temperature max13430e-3e toc10 temperature ( c) shutdown current ( a) 10 35 10 0 4 5 6 7 8 93 2 1 -40 85 60 -15 v l = 5v i cc i l driver propagation vs. temperature (max13432e) max13430e-3e toc11 temperature ( c) driver propagation delay (ns) 10 35 600 0 300 400 500200 100 -40 85 60 -15 v l = 5v t rlph t rlpl driver propagation vs. temperature (max13433e) max13430e-3e toc12 temperature ( c) driver propagation delay (ns) 10 35 80 0 40 50 6020 7030 10 -40 85 60 -15 v l = 5v t rphl t rplh receiver propagation vs. temperature max13430e-3e toc13 temperature ( c) receiver propagation delay (ns) 10 35 60 0 30 4515 -40 85 60 -15 v l = 1.8v t rphl t rplh max13432e driver propagation delay (500kbps) max13430e-3e toc14 10ns/div v l = 5v r l = 54 max13433e driver propagation delay (16mbps) max13430e-3e toc15 10ns/div v y 2v/div v z 2v/div di2v/div v l = 5v r l = 54 typical operating characteristics (continued) (v cc = +5v, v l = +5v, t a = +25?, unless otherwise noted.) max13430eCmax13433e maxim integrated 7 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface test circuits and waveforms y z v od v oc r l /2 r l /2 figure 1. driver dc test load di v l 0z y v o 0 -v o v o v l /2 t dplh t dphl 1/2 v o 10% t r 90% 90% 1/2 v o 10% t f v diff = v (y) - v (z) v diff t skew = | t dplh - t dphl | figure 3. driver propagation delays di de v l d z y v od r l c l figure 2. driver timing test circuit max13430eCmax13433e 8 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface de out t dhz 0 v l v l /2 0.25v 0 v oh generator 0 or v l s1 y z 50 de d out t dzh , t dzh(shdn) v om = (0 + v oh )/2 r l = 500 c l 50pf figure 4. driver enable and disable times (t dhz , t dzh , and t dzh(shdn) ) de v cc out t dlz 0 v l v l /2 generator 0 or v l s1 y z de 50 d out t dzl , t dzl(shdn) v om = (v ol + v cc )/2 r l = 500 c l 50pf v ol 0.25v v cc figure 5. driver enable and disable times (t dzl , t dlz , and t dzl(shdn) ) test circuits and waveforms (continued) max13430eCmax13433e maxim integrated 9 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface v id r ba receiver output ate figure 6. receiver propagation delay test circuit ab ro v oh v l/2 t rplh t rphl v ol +1v-1v the rise time and fall time of inputs a and b < 4ns figure 7. receiver propagation delays test circuits and waveforms (continued) s1 open s2 closed s3 = +1.5v ro v l 00 v oh v oh /2 s1 open s2 closed s3 = +1.5v t rhz v l 00 v oh 0.25v v l /2 s1 closed s2 open s3 = -1.5v v l 0v ol v l v l /2 s1 closed s2 open s3 = -1.5v t rlz v l 0v ol v l 0.25v generator v l +1.5v 1k c l 15pf s2 s1 50 s3 -1.5v r v id re ro re ro re ro re t rzh , t rzh(shdn) t rzl , t rzl(shdn) (v ol + v l )/2 v l /2 r ro re figure 8. receiver enable and disable times max13430eCmax13433e 10 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface pin configurations tdfn + + top view so max ep max13430emax13431e max13430emax13431e max13432emax13433e 1 v l 10 v cc 2 ro 9b 3 de 8a 4 re 7 n.c. 5 di 6 gnd + 1 v l 14 v cc 2 ro 13 n.c. 3 de 12 a 4 re 11 b 5 di 10 z 6 gnd 9y 7 n.c. 8 gnd 1 v l 10 v cc 2 ro 9 b 3 de 8 a 4 re 7 n.c. 5 di 6 gnd tdfn + ep max13432emax13434e 1 v l 14 v cc 2 ro 13 n.c. 3 de 12 a 4 re 11 b 5 di 10 z 6 gnd 9 y 7 n.c. 8 gnd max13430eCmax13433e maxim integrated 11 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface pin description pin max13430e/max13431e ?ax tdfn name function 11v l v l input logic-supply voltage. bypass v l with a 0.1? ceramic capacitor located as close as possible to the input. 22r o receiver output. when re is low and if (a - b) -50mv, ro is high; if (a - b) -200mv, ro is low. 33d e driver output enable. drive de high to enable driver outputs. these outputs are highimpedance when de is low. drive re high and de low to enter low-power shutdown mode. de is a hot-swap input (see the hot-swap capability section for details.) 44 re active-low receiver output enable. drive re low to enable ro; ro is high impedance when re is high. drive re high and de low to enter low-power shutdown mode. re is a hot-swap input (see the hot-swap capability section for details.) 55d i d r i ver inp ut. w i th d e hi g h, a l ow on d i for ces noni nver ti ng outp ut l ow and i nver ti ng outp ut hi g h. s i m i l ar l y, a hi g h on d i for ces noni nver ti ng outp ut hi g h and i nver ti ng outp ut l ow . 6 6 gnd ground 7 7 n.c. no connection. not internally connected. n.c. can be connected to gnd. 8 8 a noninverting receiver input and noninverting driver output 9 9 b inverting receiver input and inverting driver output 10 10 v cc v cc input supply voltage. bypass v cc with a 1? ceramic capacitor located as close as possible to the input for full esd protection. if full esd protection is not required,bypass v cc with a 0.1? ceramic capacitor. ep exposed pad (tdfn only). connect ep to gnd. max13430eCmax13433e 12 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface pin max13432e/max13433e so tdfn name function 11v l v l input logic supply voltage. bypass v l with a 0.1? ceramic capacitor located as close as possible to the input. 22r o receiver output. when re is low and if (a - b) -50mv, ro is high; if (a - b) -200mv, ro is low. 33d e driver output enable. drive de high to enable driver outputs. these outputs are highimpedance when de is low. drive re high and de low to enter low-power shutdown mode. de is a hot-swap input (see the hot-swap capability section for details.) 44 re active-low receiver output enable. drive re low to enable ro; ro is high impedance when re is high. drive re high and de low to enter low-power shutdown mode. re is a hot-swap input (see the hot-swap capability section for details.) 55d i d r i ver inp ut. w i th d e hi g h, a l ow on d i for ces noni nver ti ng outp ut l ow and i nver ti ng outp ut hi g h. s i m i l ar l y, a hi g h on d i for ces noni nver ti ng outp ut hi g h and i nver ti ng outp ut l ow . 6 6 gnd ground 7, 13 7, 13 n.c. no connection. not internally connected. n.c. can be connected to gnd. 8 8 gnd ground 9 9 y noninverting driver output 10 10 z inverting driver output 11 11 b inverting receiver input 12 12 a noninverting receiver input 14 14 v cc v cc input supply voltage. bypass v cc with a 1? ceramic capacitor located as close as possible to the input for full esd protection. if full esd protection is not required,bypass v cc with a 0.1? ceramic capacitor. ep exposed pad (tdfn only). connect ep to gnd. pin description (continued) max13430eCmax13433e maxim integrated 13 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface function tables and functional diagrams transmitting inputs outputs re de di z y x11 0 1 x10 1 0 00x high- impedance high- impedance 1 0 x shutdown receiving inputs output re de a-b ro 0x -50mv 1 0x - 200m v 0 0x open/ shorted 1 1 1 x high-impedance 1 0 x shutdown transmitting inputs outputs re de di b a x11 0 1 x10 1 0 10x high- impedance high- impedance 0 0 x shutdown* receiving inputs output re de a-b ro 0x -50mv 1 0x - 200m v 0 0x open/ shorted 1 1 1 x high-impedance 1 0 x shutdown* max13432e/max13433e (full duplex) max13430e/max13431e (half duplex) x = don? care. * shutdown mode, driver and receiver outputs are in high impedance. figure 9. functional diagrams a b z y gnd v cc v l di re de ro a b gnd v cc v l max13430emax13431e max13432emax13433e di re de ro d r r d max13430eCmax13433e 14 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface detailed description the max13430e?ax13433e are full- and half-duplexrs-485 transceivers that feature an adjustable low- voltage logic interface for application in multivoltage systems. this allows direct interfacing to low- voltage asic/fpgas without extra components. the max13430e?ax13433e rs-485 transceivers operate with a v cc voltage supply from +3v to +5v. the low- voltage logic interface operates with a voltage supplyfrom +1.62v to v cc . the max13430e?ax13433e are ?0kv esd-protect-ed rs-485 transceivers with one driver and one receiv- er. all devices have a 1/8-unit load receiver input impedance, allowing up to 256 transceivers on the bus. these devices include fail-safe circuitry, guaranteeing a logic-high receiver output when receiver inputs are open or shorted. the receivers output a logic-high if all transmitters on a terminated bus are disabled (high impedance). all devices feature hot-swap capability to eliminate false transitions on the bus during power-up or hot insertion. the max13430e/max13432e feature reduced slew- rate drivers that minimize emi and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 500kbps. the max13431e/max13433e driver slew rates are not limit- ed, enabling data transmission up to 16mbps. the max13430e?ax13433e transceivers draw 2ma of supply current when unloaded or when fully loaded with the drivers disabled. the max13430e/ max13431e are intended for half-duplex communica- tions, and the max13432e/max13433e are intended for full-duplex communications. low-voltage logic interface v l is the voltage supply for the low-voltage logic inter- face and receiver output. v l operates with voltage sup- ply from +1.62v to v cc . fail safe the max13430e family guarantees a logic-high receiv-er output when the receiver inputs are shorted or open, or when they are connected to a terminated transmis- sion line with all drivers disabled. this is done by set- ting the receiver input threshold between -50mv and -200mv. if the differential receiver input voltage (a - b) is greater than or equal to -50mv, ro is logic-high. if (a - b) is less than or equal to -200mv, ro is logic-low. in the case of a terminated bus with all transmitters disabled, the receiver? differential input voltage is pulled to 0v by the termination. with the receiver thresholds of the max13430e family, this results in a logic-high with a 50mv minimum noise margin. the -50mv to -200mv threshold complies with the ?00mv eia/tia/rs-485 standard. hot-swap capability when circuit boards are inserted into a hot or poweredbackplane, differential disturbances to the data bus can lead to data errors. upon initial circuit-board insertion, the data communication processor undergoes its own power-up sequence. during this period, the processor? logic-output drivers are high impedance and are unable to drive the de and re inputs of these devices to a defined logic level. leakage currents up to ?0? fromthe high-impedance state of the processor? logic drivers could cause standard cmos enable inputs of a trans- ceiver to drift to an incorrect logic level. additionally, par- asitic circuit-board capacitance could cause coupling of v l or gnd to the enable inputs. without the hot-swap capability, these factors could improperly enable thetransceiver? driver or receiver. when v l rises, an inter- nal pulldown circuit holds de low and re high. after the initial power-up sequence, the pulldown circuit becomestransparent, resetting the hot-swap tolerable input. ?0kv esd protection esd-protection structures are incorporated on all pinsto protect against electrostatic discharges encoun- tered during handling and assembly. the driver out- puts and receiver inputs of the max13430e family of devices have extra protection against static electricity. maxim? engineers have developed state-of-the- art structures to protect these pins against esd of 30kv without damage. the esd structures withstand high esd in all states: normal operation, shutdown, and powered down. after an esd event, the max13430e?ax13433e keep working without latchup or damage. esd protection can be tested in various ways. the transmitter outputs and receiver inputs of the max13430e?ax13433e are characterized for protec- tion to the following limits: ?0kv using the human body model ?0kv using the contact discharge method specified in iec 61000-4-2 ?5kv using the air gap discharge method specified in iec 61000-4-2 max13430eCmax13433e maxim integrated 15 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface esd test conditions esd performance depends on a variety of conditions.contact maxim for a reliability report that documents test setup, test methodology, and test results. human body model figure 10a shows the human body model, and figure10b shows the current waveform it generates when dis- charged into a low impedance. this model consists of a 100pf capacitor charged to the esd voltage of interest, which is then discharged into the test device through a 1.5k resistor. iec 61000-4-2 the iec 61000-4-2 standard covers esd testing andperformance of finished equipment. however, it does not specifically refer to integrated circuits. themax13430e family of devices helps you design equip- ment to meet iec 61000-4-2, without the need for addi- tional esd-protection components. the major difference between tests done using the human body model and iec 61000-4-2 is higher peak current in iec 61000-4-2 because series resistance is lower in the iec 61000-4-2 model. hence, the esd with- stand voltage measured to iec 61000-4-2 is generally lower than that measured using the human body model. figure 10c shows the iec 61000-4-2 model, and figure 10d shows the current waveform for iec 61000- 4-2 esd contact discharge test. charge-current- limit resistor discharge resistance storagecapacitor c s 100pf r c 1m r d 1500 high- voltage dc source device under test figure 10a. human body esd test model i p 100% 90% 36.8% t rl time t dl current waveform peak-to-peak ringing(not drawn to scale) i r 10% 0 0 amps figure 10b. human body current waveform charge-current- limit resistor discharge resistance storagecapacitor c s 150pf r c 50m to 100m r d 330 high- voltage dc source device under test figure 10c. iec 61000-4-2 esd test model t r = 0.7ns to 1ns 30ns 60ns t 100% 90%10% i peak i figure 10d. iec 61000-4-2 esd generator current waveform max13430eCmax13433e 16 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface applications information 256 transceivers on the bus the standard rs-485 receiver input impedance is aone-unit load (12k ), and the standard driver can drive up to 32 unit loads. the max13430e family of trans-ceivers has a 1/8-unit load receiver input impedance (96k ), allowing up to 256 transceivers to be connect- ed in parallel on one communication line. any combina-tion of these devices, as well as other rs-485 transceivers with a total of 32-unit loads or less, can be connected to the line. reduced emi and reflections the max13430e/max13432e feature reduced slew-rate drivers that minimize emi and reduce reflections caused by improperly terminated cables, allowing error-free data transmission up to 500kbps. driver output protection two mechanisms prevent excessive output current andpower dissipation caused by faults or by bus con- tention. the first, a foldback current limit on the output stage, provides immediate protection against short cir- cuits over the whole common-mode voltage range (see the typical operating characteristics .) the second, a thermal-shutdown circuit, forces the driver outputs intoa high-impedance state if the die temperature exceeds +150? (typ). typical applications the max13430e/max13433e transceivers aredesigned for bidirectional data communications on mul- tipoint bus transmission lines. figures 11 and 12 show typical network applications circuits. to minimize reflec- tions, terminate the line at both ends with its character- istic impedance, and keep stub lengths off the main line as short as possible. the slew-rate-limited max13430e/max13432e allow the rs-485 network to be more tolerant of imperfect termination. max13430eCmax13433e maxim integrated 17 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface figure 12. typical full-duplex rs-485 network ro di de r 120 d max13432emax13433e re ro dide r d re 120 120 ab z y a b z y ro di de r d re yzba ro di de r d re yzba typical application circuits figure 11. typical half-duplex rs-485 network di ro de a b re ro ro ro di di di de de de d d d r r r bb b a a a 120 120 d r max13430emax13431e re re re max13430eCmax13433e 18 maxim integrated downloaded from: http:///
rs-485 transceivers with low-voltage logic interface chip information process: bicmos package type package code document no. 10 ?ax u10-2 21-0061 14 tdfn-ep t1433-2 21-0137 10 tdfn-ep t1033-1 21-0137 14 so s14-1 21-0041 package information for the latest package outline information and land patterns,go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. packagedrawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. max13430eCmax13433e maxim integrated 19 downloaded from: http:///
rs-485 transceivers with low-voltage logic interface revision history revision number revision date description pages changed 0 10/08 initial release 1 5/09 updated ordering informaion 1 2 5/10 added an automotive temperature grade part to the ordering informaion 1 max13430eCmax13433e downloaded from: http:/// 0d[lp,qwhjudwhg5lr5reohv6dq-rvh&$86$ maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. ? maxim integrated the maxim logo and maxim integrated are trademarks of maxim integrated products, inc.

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